Shown in Figure P10.33 is a common emitter amplifier stage implemented with an npn silicon transistor and two DC supplies VCC = 12 V and VEE = 4 V. Determine VCEQ and the mode of operation.

Question

? = 100 RB = 100 k?

RC = 3 k? RE = 3 k?

Ro = 6 k? RS = 0.6 k?

vS = 1 cos(6.28 × 103t) mV

Answer 1

The "DC-blocking" or "AC coupling" capacitors act as open circuits for DC; therefore, the signal source and load can be neglected since this is a DC problem. Specify directions of current and polarities of voltages. Assume the transistor is operating in its active region; then, the base-emitter junction is forward biased and:



The collector-emitter voltage is greater (more positive) than its saturation value (+ 0.3 V for Silicon). Therefore the initial assumption (operation in the active region) was correct and the solution is valid.

Notes:

1. DC power may be supplied to an npn BJT circuit by connecting the positive terminal of a DC source to the collector circuit, or, by connecting the negative terminal of a DC source to the emitter circuit, or, as was done here, both.

2. In a pnp BJT circuit the polarities of the sources must be reversed. Negative to collector and positive to emitter.