A pipelined computer has a four?stage pipeline: fetch/decode, operand fetch, execute, writeback. All operations except load and branch do not introduce stalls. A load introduces one stall cycle. A non?taken branch introduces not stalls and a taken branch introduces two stall cycles. Consider the following loop.

for (j=1023; j > 0; j--) {x[j]=x[j]+2;}

a. Express this code in an ARM?like assembly language (assume that you cannot use autoindexed addressing and
that the only addressing mode is register indirect of the form [r0]).
b. Show a single trip round the loop and indicate how many clock cycles are required.
c. How many cycles will it take to execute this code in total?
d. How can you modify the code to reduce the number of cycles?

a. The code



mov r2,#1023

Loop ldr r0,[r1]

add r0,r0,#2

str r0,[r1]

add r1,r1,#4

subs r2,r2,#1

BNE Loop

b. A trip round the loop has 6 instructions. The load has a one cycle stall and the taken branch back has two
cycles. The total is 6 + 1 + 2 = 9 cycles.
c. The total number of cycles is 1 + 1,024 × 9 ? 2 (the minus 2 is there because the branch is not taken on the last
loop). This is 9,215 cycles.
d. You can speed up the code by unrolling the loop and performing multiple iterations per trip and avoiding the
two cycle branch delay. You could save a cycle of latency by inserting the increment r1 by 4 after the load to
hide the load stall.