A computer with a 24?bit address bus has a main memory of size 16 MB and a cache size of 64 KB. The wordlength is two bytes.
a. What is the address format for a direct mapped cache with a line size of 32 words?
b. What is the address format for a fully associative cache with a line size of 32 words?
c. What is the address format for a 4?way set associative cache with a line size of 16 words?
a. What is the address format for a direct?mapped cache with a line size of 32 words?
There are 16 MB/64 KB = 224/216 = 28 = 256 sets. Address lines A23 to A16 select a set. Bits A00 to A05 select a
byte within a line (line = 32 2?byte words = 64 bytes). The remaining address lines A06 to A15 select a line.
b. What is the address format for a fully associative cache with a line size of 32 words?
Address lines A00 to A05 select a byte in a cache line. Address lines A06 to A23 are used as the tag.
c. What is the address format for a 4?way set associative cache with a line size of 16 words?
If the cache is 4?way set associative, the effective cache size is 64KB/4 = 16 KB (as there are four parallel
direct?mapped caches). Address lines A00 to A04 select a byte in a line, nine address lines A05 to A13 select a
line address (if the cache is 16 KB and a line is 32 bytes, there are 16KB/32 = 512 lines). Address lines A14 to
A23 select the set.
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