The time to access a memory without cache is n?tm, where n is the number of accesses and tm the memory access time. The total time to access memory is the time due to cache accesses plus the time due to main memory accesses, that is, n?(tc?h + tm?m), where h is the hit rate and m the miss rate. The speedup ratio is n?tm/(n.(tc?h + tm?m)) = tm/(tc.h + tm?m). However, m = 1 ? h because h + m = 1 (an access is either a hit or a miss). Speedup ratio = tm/(tc?h + tm?(1 ? h)) = 1/(h?tc/tm + 1 ? h) = 1/(h?k + 1 ? h) where tc/tm = k.
a. tm = 70 ns, tc = 7 ns, h = 0.9
b. tm = 60 ns, tc = 3 ns, h = 0.9
c. tm = 60 ns, tc = 3 ns, h = 0.8
d. tm = 60 ns, tc = 3 ns, h = 0.97
a. tm = 70 ns, tc = 7 ns, h = 0.9 k = 0.1 S = 5.26
b. tm = 60 ns, tc = 3 ns, h = 0.9 k = 0.05 S = 6.90
c. tm = 60 ns, tc = 3 ns, h = 0.8 k = 0.05 S = 4.17
d. tm = 60 ns, tc = 3 ns, h = 0.97 k = 0.05 S = 12.74
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