A 68020 assembly language instruction that uses a bit field operation with a complex effective address is:

BFFFO ([8,A0,D1*4],4){D2,D3},D4

Write a suitable sequence of ARM processor operations that would perform the same action. Assume that the
target address is a 32?bit word.

The address of the operand is given by the memory indirect operation ([128,A0,D1*4],64). In the
following calculation we will keep the same register numbers as in the 68020 code. However, we are simplifying
this problem by assuming that the bit field is in the currently addressed base word. If not, you have to locate
the start of the bit field by dividing the offset by 32 to find the number of words it is away from the current
instruction. Moreover, if the bit field extends into the following word, you would either have to concatenate
two parts of the bit field or perform 64?bit extended shifting.



ADD r0,r0,r1, lsl #2 ;add 4 × D0 to A0

ADD r0,r0,#8 ;add the literal inner displacement

LDR r5,[r0] ;now get the pointer in memory

ADD r5,r5,#4 ;add the outer displacement

LDR r5,[r5] ;perform the second memory access to load operand in r5

Now we need to find the first 1 in the bit field with the offset D2 and length D3. Since offsets begin at the most
significant bit on the left hand, we can shift left by the number of bits in D2.

MOV r5,r5, lsl r2

Now we have to find the first 1 within the next D3 bits.



MOV r4,r2 ;the position includes the offset so start from r2

Loop MOVS r5,r5,lsl #1 ;shift bit field left and test for 1

ADDCC r4,r4,#1 ;if carry clear not 1 so bump up the counter

BCS Exit ;if carry set then 1 found so exit

SUBS r3,r3,#1 ;subtract 1 from field length

BNE Loop ;repeat if not all done

Exit ..

The test code run on the Keil simulator was:



AREA BFFFOsim, CODE, READONLY

ADR r0,P1 ;set up dummy data

MOV r1,#1 ;D1 = 1

MOV r2,#4 ;D2 = 4 = offset

MOV r3,#8 ;D3 = 8 = width

ADD r0,r0,r1, lsl #2 ;add 4 × D0 to A0

ADD r0,r0,#8 ;add the literal inner displacement

LDR r5,[r0] ;now get the pointer in memory

ADD r5,r5,#4 ;add the outer displacement

LDR r5,[r5] ;perform second memory access to load operand in r5

MOV r5,r5, lsl r2 ;

MOV r4,r2 ;the position includes the offset so start from r2

Loop MOVS r5,r5,lsl #1 ;shift bit field left and test for 1

ADDCC r4,r4,#1 ;if carry clear not 1 so bump

BCS Exit ;if carry set then 1 found so exit

SUBS r3,r3,#1 ;subtract 1 from field length

BNE Loop ;repeat if not all done

Exit B Exit

P1 DCD 0x0, 0x0, 0x0, T+8

T DCD 0xFFFFFFFF, 0x0, 0x0, 0x0010ABCD ;the bit field

END