Why is the assembly language structure (format) of ARM’s block move instructions inconsistent with ARM’s normal assembler conventions? If you were redesigning ARM’s assembly language, how might you express these operations (remember, changing the assembly language does not change the architecture – it affects only programmer productivity and accuracy).

What will be an ideal response?

Consider the structure of conventional load/store and block move operations.



LOAD LDR r0,[r1] LDMFD sp!,{r1-r3}

STORE STR r0,[r1] STMFD sp!,{r1-r3}

There are two significant inconsistencies. First, the order in which the pointer register is presented differs
between the single and block move. Second, the pointer register is in square brackets for conventional
instructions but not for the block move.

As for changes, consider the following suggestions.



LDR r0 = [r1]

STR [r1] = r0

LDMFD r1-r3 = [sp+]

STMFD [-sp] = r1-r3

In this example, I have used a consistent layout with the destination operand(s) on the left. The conventional ‘=’ symbol is used to indicate destination. This allows you to express multiple registers in a block move without any extra braces. I have used the conventional square bracket notation for indirection but made it consistent. Moreover, instead of using a ‘!’ to indicate auto?indexing I have used the symbols ‘?‘ and ‘+’ to indicate whether the increment is up or down. The increment is placed to the left of the index register for preindexing and to the right for postindexing.