Repeat Problem 11.27 for v1 = 5 V and v2 = 0 V.
Problem 11.27
For the CMOS NOR gate of Figure 11.23 identify the state of each transistor for v1 = v2 = 5 V. Assume VDD = 5V.
Analysis:
Note that the state of an NMOS transistor for a high (5 V) gate input is the same as the state of a PMOS transistor for a low (0 V) gate input; both result in the formation of a channel with the transistors in the triode (ohmic) state. In these two cases, the transistors can be represented by simple linear resistors.
The first input is high (i.e., v_1=5 V). This input turns M_1, a PMOS transistor, off and M_3, an NMOS, transistor on. Conversely, the second input is low. Thus, it turns M_2, a PMOS transistor, on and M_4, an NMOS transistor, off.
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