Prove the 8-bit adder circuitry (shown in Figure 10.16) adds 10010111 + 11001010 and produces an answer of 101100001.
What will be an ideal response?
Begin by placing the input vales as shown. Each stage of the adder receives one bit from one number (10010111) and a bit from the other number (11001010). Determine the output of each gate until the final answer is obtained. For example, the right most (LSB or least significant bit) EX-OR gate has inputs of 1 and 0. This yields an output of 1 for the EXOR gate, which is the LSB of the answer. The right most AND gate takes the same two inputs and produces a 0 output level, which feeds the EX-OR and AND gate of the next stage.
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