What is cache coherency?
What will be an ideal response?
Data in a computer with cache memory may be in the cache and memory. Clearly, it is important that the data in both memories should be the same or, if the values differ, the older and incorrect or stale value should be marked as invalid. In a single processor system, this is not normally a problem. However, with multiple processors, each with its own private cache, it is possible for one processor to update its cache and the (same) data in the other processor’s cache will remain the same (and be stale). Consequently, computers with multiple processors and caches must ensure that when a processor updates its own cache, all other lines containing the same data must
either be updated or invalidated. The process of ensuring that the data remains in step is called cache coherency.
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