The situation illustrated in the following block diagram occurs frequently when a digital computer is used to control a continuous system. The digital computer is modeled as a pure time delay of T seconds. The continuous system is a simple integrator. Use the root locus magnitude condition to find the maximum time delay such that the system remains stable.
Hint: Use a Pade approximation to represent the time delay as a rational transfer function and substitute 
What will be an ideal response?
The time delay is approximated using first order Pade approximation,
The forward loop transfer function becomes,
The transfer function is manipulated into “root locus form” by solving,
The root locus plot is shown below,
At K=0.93, the closed loop poles are at 
and the system becomes unstable as K falls below this value and for negative values as well (the CRL). This K value can also be derived from the root locus magnitude condition,
For the system to be stable, 
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