A computer has a cache with an access time of 1 cycle and an average hit rate of 95 percent. The miss penalty is 100 cycles.

a. What is the average cycle time for this computer?
b. A level 2 cache with a hit rate of 80 percent and a penalty of 6 cycles is added to this system. What effect does
this have on the average cycle time?
c. A computer with L1 and L2 caches executes 10,000 memory accesses. While the test program is running, 500
misses are recorded to the L1 cache and 300 to the L2 cache. What are the miss rates of the L1 and L2 caches?


a. What is the average cycle time for this computer?
1 × 95% + (100 + 1) × 5% = 0.95 + 5.05 = 6.00 cycles. (Note (100 + 1) because we are given the additional
access time rather than the total access time.)

b. A Level 2 cache with a hit rate of 80 percent and a penalty of 6 cycles is added to this system. What effect
does this have on the average cycle time?
The level 2 cache acts on the misses from the level 1 cache. The average time is now
1 × 95% + 5% × (80% × 7 + 20% × 101) = 0.95 + 0.050 × (5.6 + 20.1) = 0.95 + 1.285 = 2.253 cycles.

c. A computer with L1 and L2 caches executes 10,000 memory accesses. While the test program is running, 500
misses are recorded to the L1 cache and 300 to the L2 cache. What are the miss rates of the L1 and L2 cache?
The L1 cache has 500 misses, so the miss rate is 500/10,000 = 5%.
The L2 cache has 300 misses out of 500 accesses = 300/500 = 60%.

Computer Science & Information Technology

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